The present application relates to a semiconductor structure and a method of forming the same. More particularly, the present application relates to a method for forming a semiconductor structure including a high aspect ratio sacrificial gate structure that is mechanically stable and a semiconductor structure that is formed using the high aspect ratio sacrificial gate structure.
For more than three decades, the continued miniaturization of metal oxide semiconductor field effect transistors (MOSFETs) has driven the worldwide semiconductor industry. Various showstoppers to continued scaling have been predicated for decades, but a history of innovation has sustained Moore's Law in spite of many challenges. However, there are growing signs today that metal oxide semiconductor transistors are beginning to reach their traditional scaling limits. Since it has become increasingly difficult to improve MOSFETs and therefore complementary metal oxide semiconductor (CMOS) performance through continued scaling, further methods for improving performance in addition to scaling have become critical.
The use of non-planar semiconductor devices such as, for example, semiconductor fin field effect transistors (FinFETs), is the next step in the evolution of CMOS devices. FinFETs are non-planar semiconductor devices which include at least one semiconductor fin protruding from a surface of a substrate. FinFETs can increase the on-current per unit area relative to planar field effect transistors.
In some prior art processes, a functional gate structure including a gate dielectric and a gate conductor can be formed straddling the semiconductor fin prior to formation of a source region and a drain region. By “functional gate structure” it is meant, a structure used to control output current (i.e., flow of carriers in a channel) of a semiconductor device through an electrical field or, in some instances, a magnetic field.
In other prior art processes, a replacement gate process can be used in which a sacrificial gate structure is first provided straddling each semiconductor fin, and then in a later processing step (i.e., after the source region and the drain region have been formed), the sacrificial gate structure is replaced by a functional gate structure. In typical replacement gate processes, a high aspect ratio becomes essential for gate length scaling to accommodate, for example, sacrificial gate open chemical mechanical polishing and self-aligned contacts. The term “high aspect ratio” as used throughout the present application denotes a ratio between gate height and gate width that is about 5:1 or greater. Increasing semiconductor fin height, which is needed for improving device performance, results in a further increase in the aspect ratio. Thus, there is needed a method to robustly form a semiconductor structure which includes high aspect ratio functional gate structures.